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parasitic capacitance meaning in Chinese

寄生电容
生代

Examples

  1. Semi - analytical integration approach in 3 - d parasitic capacitance computation with bem
    三维寄生电容边界元计算的半解析积分方法
  2. The lna design method which absorbs the parasitic capacitance of esd is introduced and compared with the traditional design method
    同时提出了将esd的寄生电容吸收到lna输入匹配网络中的设计方式,并与传统的计算方式做了对比。
  3. Therefore , this thesis provides a detailed verification of the effects of parasitic capacitances of the anti - phase winding on the efficacy of the proposed technique
    因此,反相绕组寄生电容对该技术效能的影响在本文中得到了确认。
  4. To put it into practice , the influences of the parasitic capacitances have to be further investigated using a simplified equivalent circuit
    对于本课题组提出的反相共模抑制技术,使用一个简化的等效电路,本文进一步研究了寄生电容在其中的影响。
  5. The dac ' s output voltage can be exported by two groups of line - output structure . the simulation result shows this structure also can low the effect of the parasitic capacitances
    D a转换器采用了两组行输出的电阻串结构,能有效地降低寄生电容对转换电压输出的影响。
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